Looking for Verilog/RTL coding/digital design/Characterization Engineer

We are leading FPGA company with Asia HQ based in Singapore.

My team in Xilinx Singapore is in search of candidate with 0-5 years experience possibly in degital design/pre-silicon simulation&verification as well as post-silicon validation characterization.

Master Degree in digital design/embedded system familiar with FPGA design are welcome to apply.

We are expecting the candidate to be good at RTL coding (for IP design/pre-silicon test-bench development as well as sythesizable pattern development), high level programming possibly C/C++/System C for sythesizable test-pattern development. Exposure in ARM processor programming is a plus.

You could expect fairly competitive package including stock shares and benefits.

Suitable and interested candidates please send resumes to tlwa2011@hotmail[dot]com

Only selected candidates will be contacted for interview.

Thank you!
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2 个回答

王茂春

这个是一个职位的JD?什么都要会?
超过5年的不考虑?

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戚茜航

试试就知道了嘛
招工的条件都是相对的,不是绝对的

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  • 祁胜 提出于 2019-07-14 11:12